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 FDC855N N-Channel, Logic Level, PowerTrench(R) MOSFET
January 2008
FDC855N
Single N-Channel, Logic Level, PowerTrench MOSFET 30V, 6.1A, 27m
Features
Max rDS(on) = 27m at VGS = 10V, ID = 6.1A Max rDS(on) = 36m at VGS = 4.5V, ID = 5.3A SuperSOTTM -6 package: small footprint (72% smaller than standard SO-8; low profile (1mm thick). RoHS Compliant
tm
(R)
General Description
This N-Channel Logic Level MOSFET is an efficient solution for low voltage and battery powered applications. Utilizing Fairchild Semiconductor's advanced PowerTrench(R) process, this device possesses minimized on-state resistance to optimize the power consumption. They are ideal for applications where in-line power loss is critical.
Application
Power Management in Notebook, Hard Disk Drive
S D D
D
D
D
D
SuperSOT
TM-6
G D D Pin 1
G S
MOSFET Maximum Ratings TA = 25C unless otherwise noted
Symbol VDS VGS ID PD TJ, TSTG Parameter Drain to Source Voltage Gate to Source Voltage Drain Current -Continuous -Pulsed Power Dissipation Power Dissipation (Steady State) (Steady State) (Note 1a) (Note 1b) TA = 25C (Note 1a) Ratings 30 20 6.1 20 1.6 0.8 -55 to +150 Units V V A W C
Operating and Storage Junction Temperature Range
Thermal Characteristics
RJC RJA Thermal Resistance, Junction to Case Thermal Resistance, Junction to Ambient (Note 1) (Note 1a) 30 78 C/W
Package Marking and Ordering Information
Device Marking .855 Device FDC855N Package SuperSOT-6 Reel Size 7" Tape Width 8 mm Quantity 3000 units
(c)2008 Fairchild Semiconductor Corporation FDC855N Rev.C
1
www.fairchildsemi.com
FDC855N N-Channel, Logic Level, PowerTrench(R) MOSFET
Electrical Characteristics TJ = 25C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVDSS BVDSS TJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate to Source Leakage Current ID = 250A, VGS = 0V ID = 250A, referenced to 25C VGS = 0V, VDS = 24V, TC = 125C VGS = 20V, VDS = 0V 30 24 1 250 100 V mV/C A nA
On Characteristics
VGS(th) VGS(th) TJ rDS(on) gFS Gate to Source Threshold Voltage Gate to Source Threshold Voltage Temperature Coefficient Static Drain to Source On Resistance Forward Transconductance VGS = VDS, ID = 250A ID = 250A, referenced to 25C VGS = 10V, ID = 6.1A VGS = 4.5V, ID = 5.3A VGS = 10V, ID = 6.1A, TJ =125C VDD = 10V, ID = 6.1A 1.0 2.0 -6 20.7 28.2 30.1 20 27.0 36.0 39.3 S m 3.0 V mV/C
Dynamic Characteristics
Ciss Coss Crss Rg Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance VDS = 15V, VGS = 0V, f = 1MHz f = 1MHz 493 108 62 1.0 655 145 95 pF pF pF
Switching Characteristics
td(on) tr td(off) tf Qg Qg Qgs Qgd Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge at 10V Total Gate Charge at 5V Gate to Source Charge Gate to Drain "Miller" Charge VGS = 0V to 10V VGS = 0V to 5V VDD = 15V, ID = 6.1A VDD = 15V, ID = 6.1A, VGS = 10V, RGEN = 6 6 2 14 2 9.2 4.9 1.7 3.1 12 10 23 10 13 7.0 ns ns ns ns nC nC nC nC
Drain-Source Diode Characteristics
VSD trr Qrr Source to Drain Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0V, IS = 1.3A (Note 2) 0.80 17 6 1.2 31 12 V ns nC IF = 6.1A, di/dt = 100A/s
Notes: 1: RJA is the sum of the junction-to-case and case-to- ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design.
a. 78C/W when mounted on a 1 in2 pad of 2 oz copper.
b. 156C/W when mounted on a minimum pad of 2 oz copper.
2: Pulse Test: Pulse Width < 300 s, Duty Cycle < 2.0%.
(c)2008 Fairchild Semiconductor Corporation FDC855N Rev.C
2
www.fairchildsemi.com
FDC855N N-Channel, Logic Level, PowerTrench(R) MOSFET
Typical Characteristics TJ = 25C unless otherwise noted
20 16
ID, DRAIN CURRENT (A) VGS = 4.0V VGS = 10V VGS = 6V NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = 4.5V
4.0 3.5
VGS = 3.5V PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX
3.0
VGS = 4.0V
12 8 4 0 0
2.5 2.0
VGS = 4.5V
VGS = 3.5V PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX
1.5 1.0
VGS = 6V VGS = 10V
0.5 0 4 8 12 16 20
ID, DRAIN CURRENT(A)
1
2
3
4
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics
Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage
60
SOURCE ON-RESISTANCE (m)
1.6
NORMALIZED DRAIN TO SOURCE ON-RESISTANCE
1.4 1.2 1.0 0.8 0.6 -75
ID = 6.1A VGS = 10V
PULSE DURATION = 300s DUTY CYCLE = 2%MAX
50
ID = 6.1A
rDS(on), DRAIN TO
40
TJ = 125oC
30
TJ = 25oC
-50
-25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC)
20 3 4 5 6 7 8 9 10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On- Resistance vs Junction Temperature
20
IS, REVERSE DRAIN CURRENT (A)
PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX
Figure 4. On-Resistance vs Gate to Source Voltage
20 10
VGS = 0V
16
ID, DRAIN CURRENT (A) VDS = 10V
1
TJ = 150oC TJ = 25oC
12 8
TJ = 150oC TJ = 25oC TJ = -55oC
0.1
4 0 1
0.01
TJ = -55oC
2
3
4
5
0.001 0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode Forward Voltage vs Source Current
(c)2008 Fairchild Semiconductor Corporation FDC855N Rev.C
3
www.fairchildsemi.com
FDC855N N-Channel, Logic Level, PowerTrench(R) MOSFET
Typical Characteristics TJ = 25C unless otherwise noted
10
VGS, GATE TO SOURCE VOLTAGE(V) ID = 6.1A
1000
Ciss
8
VDD = 15V CAPACITANCE (pF)
6
VDD = 10V VDD = 20V
Coss
4 2 0 0 3 6
Qg, GATE CHARGE(nC)
100
Crss
f = 1MHz VGS = 0V
9
12
20 0.1
1
10
30
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs Drain to Source Voltage
100
P(PK), PEAK TRANSIENT POWER (W)
30 10
ID, DRAIN CURRENT (A)
100s
VGS = 10V
SINGLE PULSE RJA = 156oC/W TA = 25oC
1ms
1
THIS AREA IS LIMITED BY rDS(on)
10ms 100ms 1s DC
10
0.1
SINGLE PULSE TJ = MAX RATED RJA = 156oC/W TA = 25oC
1 0.5 -3 10 10
-2
0.01 0.01
0.1
1
10
100
10
-1
1
10
100
1000
VDS, DRAIN to SOURCE VOLTAGE (V)
t, PULSE WIDTH (s)
Figure 9. Forward Bias Safe Operating Area
Figure 10. Single Pulse Maximum Power Dissipation
2
1
NORMALIZED THERMAL IMPEDANCE, ZJA
DUTY CYCLE-DESCENDING ORDER
D = 0.5 0.2 0.1 0.05 0.02 0.01
PDM
0.1
t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJA x RJA + TA
SINGLE PULSE RJA = 156 C/W
o
0.01 -3 10
10
-2
10
-1
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 11. Transient Thermal Response Curve
(c)2008 Fairchild Semiconductor Corporation FDC855N Rev.C
4
www.fairchildsemi.com
FDC855N N-Channel, Logic Level, PowerTrench(R) MOSFET
Dimensional Outline and Pad Layout
(c)2008 Fairchild Semiconductor Corporation FDC855N Rev.C
5
www.fairchildsemi.com
FDC855N N-Channel, Logic Level, PowerTrench(R) MOSFET
TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidianries, and is not intended to be an exhaustive list of all such trademarks. ACEx(R) Build it NowTM CorePLUSTM CROSSVOLTTM CTLTM Current Transfer LogicTM EcoSPARK(R) EZSWITCHTM *
TM
(R)
Fairchild(R) Fairchild Semiconductor(R) FACT Quiet SeriesTM FACT(R) FAST(R) FastvCoreTM FlashWriter(R) *
tm
FPSTM FRFET(R) Global Power ResourceSM Green FPSTM Green FPSTM e-SeriesTM GTOTM i-LoTM IntelliMAXTM ISOPLANARTM MegaBuckTM MICROCOUPLERTM MicroFETTM MicroPakTM MillerDriveTM Motion-SPMTM OPTOLOGIC(R) OPTOPLANAR(R)
(R)
tm
PDP-SPMTM Power220(R) POWEREDGE(R) Power-SPMTM PowerTrench(R) Programmable Active DroopTM QFET(R) QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM SMART STARTTM SPM(R) STEALTHTM SuperFETTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8
SupreMOSTM SyncFETTM (R) The Power Franchise(R)
tm
TinyBoostTM TinyBuckTM TinyLogic(R) TINYOPTOTM TinyPowerTM TinyPWMTM TinyWireTM SerDesTM UHC(R) Ultra FRFETTM UniFETTM VCXTM
* EZSWITCHTM and FlashWriter(R) are trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD'S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support, device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only.
Rev. I33
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
(c)2008 Fairchild Semiconductor Corporation FDC855N Rev.C
www.fairchildsemi.com


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